diff options
Diffstat (limited to 'stylophone.kicad_pcb')
| -rw-r--r-- | stylophone.kicad_pcb | 898 |
1 files changed, 770 insertions, 128 deletions
diff --git a/stylophone.kicad_pcb b/stylophone.kicad_pcb index 7a24733..5cbcee3 100644 --- a/stylophone.kicad_pcb +++ b/stylophone.kicad_pcb @@ -39,6 +39,7 @@ (setup (pad_to_mask_clearance 0) + (aux_axis_origin 100 0) (pcbplotparams (layerselection 0x00010fc_ffffffff) (plot_on_all_layers_selection 0x0000000_00000000) @@ -76,31 +77,36 @@ ) (net 0 "") - (net 1 "Net-(C1-Pad1)") - (net 2 "Net-(J1-Pin_1)") - (net 3 "Net-(J2-Pin_1)") - (net 4 "Net-(J3-Pin_1)") - (net 5 "Net-(J4-Pin_1)") - (net 6 "Net-(J5-Pin_1)") - (net 7 "Net-(J6-Pin_1)") - (net 8 "Net-(J7-Pin_1)") - (net 9 "Net-(J8-Pin_1)") - (net 10 "Net-(J9-Pin_1)") - (net 11 "Net-(J10-Pin_1)") - (net 12 "Net-(J11-Pin_1)") - (net 13 "Net-(J12-Pin_1)") - (net 14 "Net-(J13-Pin_1)") - (net 15 "Net-(J14-Pin_1)") - (net 16 "Net-(J15-Pin_1)") - (net 17 "Net-(U1-Pad11)") - (net 18 "Net-(LS1-Pad1)") - (net 19 "GND") - (net 20 "Net-(LS1-Pad2)") - (net 21 "VCC") + (net 1 "Net-(J1-Pin_1)") + (net 2 "Net-(J2-Pin_1)") + (net 3 "Net-(J3-Pin_1)") + (net 4 "Net-(J4-Pin_1)") + (net 5 "Net-(J5-Pin_1)") + (net 6 "Net-(J6-Pin_1)") + (net 7 "Net-(J7-Pin_1)") + (net 8 "Net-(J8-Pin_1)") + (net 9 "Net-(J9-Pin_1)") + (net 10 "Net-(J10-Pin_1)") + (net 11 "Net-(J11-Pin_1)") + (net 12 "Net-(J12-Pin_1)") + (net 13 "Net-(J13-Pin_1)") + (net 14 "Net-(J14-Pin_1)") + (net 15 "Net-(J15-Pin_1)") + (net 16 "GND") + (net 17 "VCC") + (net 18 "Net-(U2-THR)") + (net 19 "Net-(J16-Pin_1)") + (net 20 "Net-(J17-Pin_1)") + (net 21 "Net-(J18-Pin_1)") + (net 22 "Net-(J19-Pin_1)") + (net 23 "Net-(J20-Pin_1)") + (net 24 "Net-(J21-Pin_1)") + (net 25 "Net-(U2-CV)") + (net 26 "unconnected-(U2-DIS-Pad7)") (footprint "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" (layer "F.Cu") (tstamp 04b4d829-261f-42c7-af5b-0c196f720cd7) - (at 122.75 136.78 90) + (at 67 75.08 90) (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (property "Sheetfile" "stylophone.kicad_sch") @@ -154,9 +160,9 @@ (fp_line (start 10.16 0) (end 8.23 0) (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp f9f42b45-85ca-4fe3-ae48-403976187814)) (pad "1" thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask") - (net 3 "Net-(J2-Pin_1)") (pintype "passive") (tstamp c9016509-a662-4e55-9d08-d5680faceb1e)) + (net 2 "Net-(J2-Pin_1)") (pintype "passive") (tstamp c9016509-a662-4e55-9d08-d5680faceb1e)) (pad "2" thru_hole oval (at 10.16 0 90) (size 1.6 1.6) (drill 0.8) (layers "*.Cu" "*.Mask") - (net 4 "Net-(J3-Pin_1)") (pintype "passive") (tstamp c5df2863-afc5-4b22-bf81-d3e3b1029992)) + (net 3 "Net-(J3-Pin_1)") (pintype "passive") (tstamp c5df2863-afc5-4b22-bf81-d3e3b1029992)) (model "${KICAD6_3DMODEL_DIR}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl" (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -164,88 +170,142 @@ ) ) - (footprint "Package_DIP:DIP-14_W7.62mm" (layer "F.Cu") - (tstamp 06335370-4b69-488c-ae4a-103f52a82dcb) - (at 112.275 114.5 90) - (descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (footprint "Package_DIP:DIP-8_W7.62mm" (layer "F.Cu") + (tstamp 05d834d6-3488-4d68-9751-651158a0dc35) + (at 67.2 59.8 90) + (descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") (property "Sheetfile" "stylophone.kicad_sch") (property "Sheetname" "") - (property "ki_description" "Hex inverter schmitt trigger") - (property "ki_keywords" "HCMOS not inverter") - (path "/c38cc6d4-4c3f-40d3-a1a7-c6784eb80bca") + (property "ki_description" "Precision Timers, 555 compatible, PDIP-8") + (property "ki_keywords" "single timer 555") + (path "/1699e93a-260d-40d2-a31d-3f087fe83d5b") (attr through_hole) - (fp_text reference "U1" (at 3.81 -2.33 90) (layer "F.SilkS") + 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